This invention relates to apparatus for plasma dicing a semiconductor substrate of the type forming part of a workpiece, the workpiece further comprising a carrier sheet on a frame member, wherein the carrier sheet carries the semiconductor substrate. The invention relates also to associated methods of plasma dicing.
Semiconductor manufacture typically involves large numbers of silicon chips being processed in parallel on a single semiconductor wafer. Once the processing steps are completed, the wafer must be diced into discrete chips. Connections are then made to the chips which are subsequently packaged. Traditionally, the dicing step has been carried out using diamond saws which cut along scribe lines on the wafer. Recently, there has been much interest in providing new methods for dicing wafers. These offer the possibility of enhanced performance and lower cost. One such approach is to use lasers to carry out the dicing of the wafer. An alternative approach is to use plasma etching to dice the wafer. This has benefits in terms of minimising die edge damage, maximising the efficient use of the wafer surface by using very narrow scribe lines, and providing the option to use non-orthogonal scribe line layouts. Depending on the application requirement, the plasma etching can occur before or after thinning or grinding of the wafer.
Silicon wafers are presented for dicing on a “frame and tape” carrier. FIG. 7 is a semi-schematic representation of such an arrangement showing a silicon wafer 71 with discrete chips 73 separated by scribe lines 72. The wafer 71 is adhered by an adhesive to a carrier tape 74 which is retained by an annular frame ring 76. A plasma 9 is used to etch the exposed scribe lines in a vacuum system (not shown). The wafer 71/carrier tape 74/frame 76 forms a workpiece assembly which is placed on a platen 75. The platen retains the workpiece, provides cooling, and optionally an RF bias to aid the etch process. Frequently, an electrostatic chuck (ESC) is used to improve heat coupling between the wafer and the platen. U.S. Pat. No. 8,691,702 discloses an ESC based platen assembly which can process taped wafers on a frame. A lift mechanism is provided which raises the workpiece to allow it to be moved to and from the platen. A frame cover spaced apart from the frame is provided which protects the lift mechanism and the frame. An extension of the frame cover or a separate component is provided to protect the tape in the vicinity of the frame. The ESC is provided with appropriate cooling channels to remove heat from the chuck. The removal of heat during the process in order to maintain suitable working temperatures is an important consideration. The carrier tape is at particular risk of overheating. Typically, the carrier tape is formed from a polymeric material such as a polyolefin (PO) polyvinyl chloride (PVC) or polyethylene terephthalate (PET) with a softening point of around 90° C. In practice, it is considered necessary to maintain the temperature of the carrier tape at 80° C. or less during processing to avoid damage to the tape or to the acrylic adhesive used on the tape. Thermal runaway is a constant risk as the thickness of the tape is typically less than 200 microns and therefore the tape has a low thermal capacity.
It is desirable for economic reasons to dice wafers as quickly as possible while maintaining the process specification. This is typically achieved by running the plasma etch tool at a high RF power to increase the exposed material in the scribe lines of the semiconductor wafer. The use of high etch rate regimes increases the likelihood of overheating. Therefore, there is a strong desire to achieve high etch rates in plasma dicing to maximise throughput whilst avoiding damage to the workpiece, in particular avoiding damage to the carrier tape or the associated adhesive. It is particularly desirable to be able to maintain the temperature of the carrier tape at 80° C. or less.